Abstract
An effective route to achieving high gain and low saturation voltage in thin-film transistors is by controlling the current by modulating the conductivity of the source contact area [1-3], potentially at the expense of operating speed. Such devices, called source-gated transistors (SGTs) are easily made using the usual techniques, in a variety of organic and inorganic semiconductor technologies, with the requirement that a potential barrier is reliably engineered at the source electrode. Most often, this barrier results from the presence of a Schottky contact [4], which has been proven beneficial in similar devices [5]. As this type of TFT gains popularity, novel ideas which leverage both the device physics and the specifics of the fabrication process are emerging [6].
In this paper we will discuss recent advances in device architecture and highlight important design decisions specific to the envisaged application. Since the contact injection area plays an important part in this type of devices, it is an essential design parameter. Traditionally, contact overlap should be minimized to reduce capacitance, but in SGTs it may be advantageous to purposely increase gate-to-source overlap. Interesting circuit behaviour results from the sizing of this parameter [7] and could be useful in designing circuit blocks which take advantage of this factor, in contrast with conventional TFT circuit design. This reasoning is especially relevant to pixel circuits where a storage capacitor is required in the circuit between these two electrical nodes: circuit optimization necessarily includes electrical characteristics and layout area.
In many applications, the versatility and robustness of these contact-controlled devices outweighs their reduced operating frequency, and their ease of fabrication recommends them for high-gain circuits where uniformity of performance is critical.
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