Formal verification of fault-tolerant software design: the CSP approach

WL Yeung; SA Schneider

doi:10.1016/j.micpro.2004.07.005

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Formal verification of fault-tolerant software design: the CSP approach

Journal article

Open access

Peer reviewed

Formal verification of fault-tolerant software design: the CSP approach

WL Yeung and SA Schneider

MICROPROCESSORS AND MICROSYSTEMS, Vol.29(5), pp.197-209

01/06/2005

DOI: https://doi.org/10.1016/j.micpro.2004.07.005

Abstract

Science & Technology

Technology

Computer Science

Hardware & Architecture

Computer Science

Theory & Methods

Engineering

Electrical & Electronic

Computer Science

Engineering

COMPUTER SCIENCE

HARDWARE & ARCHITECTURE

COMPUTER SCIENCE

THEORY & METHODS

ENGINEERING

ELECTRICAL & ELECTRONIC

fault tolerance

formal verification

model checking

software design

RECOVERY BLOCKS

SPECIFICATION

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Title: Formal verification of fault-tolerant software design: the CSP approach
Creators: WL Yeung
SA Schneider
Publication Details: MICROPROCESSORS AND MICROSYSTEMS, Vol.29(5), pp.197-209
Publisher: ELSEVIER SCIENCE BV
Date published: 01/06/2005
Date submitted: 21/08/2011
Identifiers: 99513981202346
Academic Unit: Department of Computer Science
Language: English
Resource Type: Journal article

Formal verification of fault-tolerant software design: the CSP approach

Abstract

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