Abstract
Forming highly conducting, ultra-shallow boron doped layers, is well known to be a challenge for future CMOS devices. This paper reviews a technique known as vacancy engineering, which is a co-implant process that has been proven to be efficient in reducing anomalous effects, such as transient enhanced diffusion and dopant clustering. Due to relatively low improvement factors, vacancy engineering has never been implemented as an industrial process. However, recent advancements demonstrate that by optimizing the implant substrate and anneal parameters it is possible to produce low resistive, p-type layers with a high degree of thermal stability which rival the more preferred techniques used today.