Abstract
During neutron irradiation of 4-Mb SRAMs, large-scale multiple cell upsets (MCUs) were observed. These were observed in 90-nm devices at accelerated test facilities providing fission, fusion, and spallation neutron environments. The MCUs are shown to manifest themselves in 2-D patterns encompassing scores of cells, which, even with bit interleaving, lead to uncorrectable multiple bit upsets (MBU) in the same word. The mechanism behind the MCU appears to be micro-latching within blocks of the memory array that are powered up sequentially during the read cycle of the device. © 1963-2012 IEEE.