Abstract
CMOS scaling is rapidly reaching physical limits, forcing the industry to consider alternative routes to realise performance improvements. Strain-engineering is one such option and is already widely exploited in order to improve charge transport in the device channel. Almost every leading chipmaker has announced their version of strain-engineered CMOS and strain is forecast to play a major role in future device generations. The effects of strain-engineering are certainly not restricted to the device channel. For example, the heavily doped source/drain extension regions are subjected to high levels of strain that can play a major role in determining dopant activation, dopant diffusion and carrier mobility. A vigorous research effort is underway in order that highly active doping concentrations with minimal diffusion and good charge mobility are achieved. Since conventional dopant solubility limits already restrict dopant activation, scientists employ innovative methods to try to heighten doping ceilings. Such research has tended to focus on ordinary, unstrained silicon and up until now, no comprehensive experimental research has been carried out to address the subject of heavy doping in the context of strain-engineering. In this thesis, a detailed study into the effects of tensile strain on impurity activation and carrier mobility has been carried out for n-type dopants in silicon. Significant stress effects have been uncovered including a 30% strain-induced electron mobility enhancement to the universal mobility curve. This improves the resistance characteristic of heavily n-doped regions by 30%. For arsenic, tensile strain is shown to have little effect on dopant activation. Since tensile strain also increases arsenic diffusion, the effects of strain on arsenic doping are mixed since higher mobility is annulled by increased arsenic diffusion. On the other hand, tensile strain is shown to positively affect antimony doping in strained silicon. In addition to reducing antimony diffusion, modest amounts of tensile strain increase both electron mobility by 30% and increase antimony activation by a factor of 2 or more. These effects combine to create antimony ultrashallow junctions in strained silicon with a sheet resistance of <600Ω/Sq, a junction depth of 10nm and junction abruptness of 2mn/decade - satisfying the requirements of the semiconductor technology roadmap for upcoming technology nodes.