Abstract
This thesis demonstrates that the formation of titanium disilicide for gate level interconnects in silicon VLSI processes is possible, and is compatible with the processes considered. By using this new material the operating speed of fine geometry integrated circuits can be increased. The first two chapters consider the choice of titanium disilicide as a replacement for polysilicon. A process schedule is developed which enables the deposition and annealing of cosputtered films of titanium and silicon. By carefully controlling their deposition, cosputtered films have been annealed in both standard diffusion furnaces and also in rapid isothermal anneal (RIA) systems. This success in annealing titanium disilicide films in a RIA system is a world first. Next a process schedule for the deposition and anneal of titanium films over silicon is determined. The reaction of the film with the anneal ambient and the movement of impurities inevitably present in the titanium film is considered in some detail. This work was the first to highlight the benefits gained from the use of nitrogen as the anneal ambient. Self-aligned processes rely on the interaction between titanium and silicon dioxide being negligible. The silicide formation anneal is therefore optimised to minimise this. Finally, reaction of the silicide with common dopants and with both oxidising and nitriding ambients is presented. A novel method of forming a titanium nitride over silicide contact structure is developed. In summary, this thesis demonstrates how a titanium disilicide based metallisation can be implemented into an existing MOS process.