Abstract
The continuing trend in the development of digital signal processors of increasing sophistication using devices of rising levels of integration complexity is not without problems. Sometimes the processors fail to perform reliably due to errors in manufacture or design. Existing quality assurance techniques generally place emphasis on the location or prevention of faults in manufacturing but tend to neglect the detection of errors in design. However, errors in design often have a far greater effect on the quality and cost of the final product than do errors in manufacture. The introduction of control procedures such as Defence Standard 05-21, has attempted to some extent to address the problem of controlling design but, in practice, this does not appear to have made much impact in areas where very complex systems are concerned. The problem of ensuring that the design process has been carried out adequately is exacerbated in fields- where the rate of change of device technology is high. The setting of standards of the design often rests entirely with the system designers as they may be the only individuals in an organisation who really understand the detail of a particular system. Thus, the design may not be thoroughly independently checked and it is possible for design errors due to some misunderstanding of requirement or shortfall in design, to go undetected until late in the project, by which time the error may be very expensive or even impossible to rectify. This research evaluates the idea of using a design methodology to increase the effectiveness and reliability of the design process in achieving low life cycle cost. The methodology has been developed and applied during the design of a complex high speed digital signal processor.